High-Power, Quad, PSE Controller
for Power-Over-Ethernet
______________________________________________________________________________________   37
Enable the SMODE function (Table 25) by setting
EN_WHDOG (R1Fh[7]) to 1. SMODE_ bit goes high
when the watchdog counter reaches zero and the
port(s) switch over to hardware-controlled mode.
SMODE_ also goes high each and every time the soft-
ware tries to power on a port, but is denied since the
port is in hardware mode. A reset sets R1Ch = 00h.
Table 25. SMODE Enable Register
ADDRESS = 1Ch
SYMBOL
BIT
CoR
DESCRIPTION
SMODE4
3
CoR
Port 4 hardware control flag
SMODE3
2
CoR
Port 3 hardware control flag
SMODE2
1
CoR
Port 2 hardware control flag
SMODE1
0
CoR
Port 1 hardware control flag
Table 26. Watchdog Register
ADDRESS = 1Eh
SYMBOL
BIT
R/W
DESCRIPTION
7
R/W
WDTIME[7]
6
R/W
WDTIME[6]
5
R/W
WDTIME[5]
4
R/W
WDTIME[4]
3
R/W
WDTIME[3]
2
R/W
WDTIME[2]
1
R/W
WDTIME[1]
WDTIME
0
R/W
WDTIME[0]
Set EN_WHDOG (R1Fh[7]) to 1 to enable the watchdog
function. When activated, the watchdog timer counter,
WDTIME[7:0], continuously decrements toward zero
once every 164ms. Once the counter reaches zero
(also called watchdog expiry), the MAX5952 enters
hardware-controlled mode and each port shifts to a
mode set by the HWMODE_ bit in register R1Fh (Table
27). Use software to set WDTIME (Table 26) and contin-
uously set this register to some nonzero value before
the register reaches zero to prevent a watchdog expiry.
In this way, the software gracefully manages the power
to ports upon a system crash or switchover.
While in hardware-controlled mode, the MAX5952
ignores all requests to turn the power on and the flag
SMODE_ indicates that the hardware has taken control
of the MAX5952 operation. In addition, the software is
not allowed to change the mode of operation in hard-
ware-controlled mode. A reset sets R1Eh = 00h.
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